This is the mail archive of the
libc-alpha@sources.redhat.com
mailing list for the glibc project.
Re: [anton@samba.org: [PATCH]: Bug in ppc32 ld.so]
> Date: Tue, 16 Jul 2002 15:55:30 -0700
> From: Anton Blanchard <anton@samba.org>
> > Can you come up with an example of how the CPU might do this?
> > Remember, this code is not used for ld.so's PLT itself. At the time
> > this routine is running, there should be no references to the
> > newly-created PLT in the instruction sequence from that point, nor
> > would sequential fetching reach the code.
>
> Recent cpus predict branch and link and branch to link instructions and do
> not always get it right. It is conceivable that the cpu mispredicts into
> the zeroed page.
>
> POWER4 also employs other methods for its prediction and we would need a
> guarantee from the processor guys that it will not incorrectly predict
> into the zeroed page under any circumstances.
That makes sense. Can you post a revised patch?
--
- Geoffrey Keating <geoffk@geoffk.org> <geoffk@redhat.com>