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The Motorola PowerPC Programming Environments book at
Appendix F-9 defines a simplified branch mnemonic of the
form :
bne cr3, target
where `cr3' is defined at F-1 as `symbol cr3' value `3', these
symbols also being used by the cmp mnemonics etc - I have the
cr symbols #defined to be the appropriate values.
When I assemble or disassemble powerpc code using gas,
I see that the assembler expects
bne 4*cr3, target
... this caused me a headache when writing some assembler,
since the former expression (which I had used) assembled
without warning generating erroneous code which disassembles
as
bne 4*cr0, target
This erroneous code is generated because the least significant
bits of the first argument are masked off and ignored (it is
expecting the value 12, not the value 3), and there is
zero in the most significant bits.
I am not putting forward a patch since I'm not sure of the
correct solution (apart from me rewriting my code which I've
already done!).
I suggest one of the following:
1) Change the assembler syntax to follow that of Motorola.
This may involve gcc changes?
2) Test the bottom bits of the first argument for such
branches, and report a warning/error if they are set.
This would give a warning for any assembler code of
the form defined in the Motorola specification.
- I believe that this should be done in the `insert_cr'
function in opcodes/ppc-opc.c
I am working using the 26/05/95 snapshot, I got directory
checksum errors on the 07/06/95 snapshot I downloaded so
was unable to check to see if this problem is still present,
but I believe that it is.
Nick
--
Nick Stephen Email: stephen@gr.osf.org
OSF Research Institute Phone: +33 76 63 48 72
2, Avenue de Vignate Fax: +33 76 51 05 32
38610 Gieres - France