diff -U 5 -r ../../ecos/packages/devs/eth/powerpc/quicc2/current/ChangeLog devs/eth/powerpc/quicc2/current/ChangeLog
--- ../../ecos/packages/devs/eth/powerpc/quicc2/current/ChangeLog	Fri Apr 11 10:38:46 2003
+++ devs/eth/powerpc/quicc2/current/ChangeLog	Fri Apr 11 10:37:32 2003
@@ -1,5 +1,9 @@
+2003-04-11  Christoph Csebits  <christoph dot csebits at frequentis dot com>
+        * src/if_fec.h:
+        * src/fec.h: handle only error-free received frames
+
 2002-12-12  Gary Thomas  <gthomas at ecoscentric dot com>
 2002-12-12  Patrick Doyle <wpd at delcomsys dot com>
 
 	* src/types.h: 
 	* src/if_fec.c: 
diff -U 5 -r ../../ecos/packages/devs/eth/powerpc/quicc2/current/src/fec.h devs/eth/powerpc/quicc2/current/src/fec.h
--- ../../ecos/packages/devs/eth/powerpc/quicc2/current/src/fec.h	Thu Dec 12 22:15:26 2002
+++ devs/eth/powerpc/quicc2/current/src/fec.h	Fri Apr 11 08:33:13 2003
@@ -128,10 +128,13 @@
 #define FEC_BD_Rx_NO         0x0010  // Non-octet aligned frame
 #define FEC_BD_Rx_SH         0x0008  // Short frame
 #define FEC_BD_Rx_CR         0x0004  // CRC error
 #define FEC_BD_Rx_OV         0x0002  // Overrun
 #define FEC_BD_Rx_TR         0x0001  // Frame truncated. late collision
+#define FEC_BD_Rx_Errors     ( FEC_BD_Rx_LG | FEC_BD_Rx_NO | \
+                               FEC_BD_Rx_SH | FEC_BD_Rx_CR | \
+                               FEC_BD_Rx_OV | FEC_BD_Rx_TR )
 
 #define FEC_PRAM_TxBD_Base   (FEC_PRAM_TIPTR + 0x400)
 #define FEC_BD_Tx_Ready      0x8000  // Frame ready
 #define FEC_BD_Tx_Pad        0x4000  // Pad short frames
 #define FEC_BD_Tx_Wrap       0x2000  // Wrap: Last buffer in ring
@@ -143,10 +146,13 @@
 #define FEC_BD_Tx_LC         0x0080  // Late collision
 #define FEC_BD_Tx_RL         0x0040  // Retransmission limit
 #define FEC_BD_Tx_RC         0x003C  // Retry count 
 #define FEC_BD_Tx_UN         0x0002  // Underrun
 #define FEC_BD_Tx_CSL        0x0001  // Carrier sense lost
+#define FEC_BD_Tx_Errors     ( FEC_BD_Tx_LC | FEC_BD_Tx_RL | \
+                               FEC_BD_Tx_UN | FEC_BD_Tx_CSL )
+
 
 
 // Buffer descriptor
 struct fec_bd {
     volatile unsigned short  ctrl;
diff -U 5 -r ../../ecos/packages/devs/eth/powerpc/quicc2/current/src/if_fec.c devs/eth/powerpc/quicc2/current/src/if_fec.c
--- ../../ecos/packages/devs/eth/powerpc/quicc2/current/src/if_fec.c	Thu Dec 12 22:15:26 2002
+++ devs/eth/powerpc/quicc2/current/src/if_fec.c	Fri Apr 11 10:34:21 2003
@@ -584,24 +584,30 @@
 
   rxbd = qi->rnext;
   while ((rxbd->ctrl & FEC_BD_Rx_Empty) == 0) {
     qi->rxbd = rxbd;  // Save for callback
 
-    // This is the right way of doing it, but dcbi has a bug ...
-    //    if (cache_state) {
-    //      HAL_DCACHE_INVALIDATE(rxbd->buffer, rxbd->length); 
-    //    }
-    (sc->funs->eth_drv->recv)(sc, rxbd->length);
-    if (cache_state) {
-      HAL_DCACHE_FLUSH(rxbd->buffer, rxbd->length); 
+    // handle only error-free received frames
+    if ((rxbd->ctrl & FEC_BD_Rx_Errors) == 0) {
+
+      // This is the right way of doing it, but dcbi has a bug ...
+      //    if (cache_state) {
+      //      HAL_DCACHE_INVALIDATE(rxbd->buffer, rxbd->length); 
+      //    }
+      (sc->funs->eth_drv->recv)(sc, rxbd->length);
+      if (cache_state) {
+        HAL_DCACHE_FLUSH(rxbd->buffer, rxbd->length); 
+      }
     }
 
-    rxbd->ctrl |= FEC_BD_Rx_Empty;
+    // clear flags and increment BD pointer (wrap if needed)
     if (rxbd->ctrl & FEC_BD_Rx_Wrap) {
+      rxbd->ctrl = FEC_BD_Rx_Empty | FEC_BD_Rx_Int | FEC_BD_Rx_Wrap;
       rxbd = qi->rbase;
     } else {
-      rxbd++;
+      rxbd->ctrl = FEC_BD_Rx_Empty | FEC_BD_Rx_Int;
+      ++rxbd;
     }
   }
   // Remember where we left off
   qi->rnext = (struct fec_bd *)rxbd;