Index: devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl =================================================================== RCS file: /cvs/ecos/ecos/packages/devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl,v retrieving revision 1.7 diff -u -b -B -w -p -u -r1.7 flash_intel_28fxxx.cdl --- devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl 12 Dec 2002 21:15:27 -0000 1.7 +++ devs/flash/intel/28fxxx/current/cdl/flash_intel_28fxxx.cdl 21 Feb 2003 10:07:06 -0000 @@ -116,6 +116,17 @@ cdl_package CYGPKG_DEVS_FLASH_INTEL_28FX part in the family." } + cdl_option CYGHWR_DEVS_FLASH_INTEL_28F800B5 { + display "Intel 28F800B5 flash memory support" + default_value 0 + #implements CYGHWR_IO_FLASH_BLOCK_LOCKING + implements CYGINT_DEVS_FLASH_INTEL_VARIANTS + description " + When this option is enabled, the Intel flash driver will be + able to recognize and handle the 28F800B5 + part in the family." + } + cdl_option CYGHWR_DEVS_FLASH_SHARP_LH28F016SCT_Z4 { display "Sharp LH28F016SCT-Z4 flash memory support" default_value 0 Index: devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl =================================================================== RCS file: /cvs/ecos/ecos/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl,v retrieving revision 1.7 diff -u -b -B -w -p -u -r1.7 flash_28fxxx_parts.inl --- devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl 12 Dec 2002 21:15:27 -0000 1.7 +++ devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl 21 Feb 2003 10:07:06 -0000 @@ -209,6 +209,43 @@ }, #endif +#ifdef CYGHWR_DEVS_FLASH_INTEL_28F800B5 + { // 28F800B5-T + device_id : FLASHWORD(0x889c), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 8, + device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1), + locking : false, + buffered_w : false, + bootblocks : true, + bootblocks : { 0xE0000, + 0x18000, + 0x2000, + 0x2000, + 0x4000 + }, + banked : false + }, + { // 28F800B5-B + device_id : FLASHWORD(0x889d), + block_size : 0x20000 * CYGNUM_FLASH_INTERLEAVE, + block_count: 8, + device_size: 0x100000 * CYGNUM_FLASH_INTERLEAVE, + base_mask : ~(0x100000 * CYGNUM_FLASH_INTERLEAVE - 1), + locking : false, + buffered_w : false, + bootblocks : true, + bootblocks : { 0x00000, + 0x4000, + 0x2000, + 0x2000, + 0x18000 + }, + banked : false + }, +#endif + #endif // 16 bit devices