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Re: In-order exection of I/O on PowerPC 60x
On Thu, Mar 23, 2006 at 01:52:19PM +0100, Peter Graf wrote:
> Andrew Lunn wrote:
> >> When I placed a sync instruction between the critical read accesses,
> >> instead of eieio, our problems disappeared. (The sync instruction covers
> >> reads even if memory is not marked as "guarded".)
> >
> > What is the overhead of a sync compaired to an eieio? Should we just
> > change the barrier macro?
>
> The respective freescale docs let me hesitate, and I'm not PowerPC
> expert enough anyway.
Me neither. Hence the question.
> Quote from (MPCFPE32B/AD REV2, page 8-198):
>
> "The functions performed by the sync instruction will normally take a
> significant amount of time to complete, so indiscriminate use of this
> instruction may adversely affect performance. In addition, the time
> required to execute sync may vary from one execution to another.
> The eieio instruction may be more appropriate than sync for many cases."
>
> The other option would be to mark the respective memory regions as
> "guarded", but this involves changes on several platforms.
Gary knowns more about the PPC, i will wait for a comment from him...
Andrew
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