Re: ldrb vs ldrh in gcc-3.4.4 (ARM)

[Duane Ellis <duane_ellis at franklin dot com>]

> ----- Message from Steven Scholz <steven.scholz@imc-berlin.de> on 


> I noticed that gcc-3.4.4 for ARM is using byte wise loading instructions 


Seems that GCC is trying to deal with un-aligned access issues.

GCC-ARM has a "--malignment-traps" option. I wonder if it some how
turned on by default. (Or something like that, my gcc-info is old
perhaps it has changed)

Suggestions:

1)      Look at the pre-processor output - perhaps there is a pragma
        that you did not know about - or something like that that
        has told GCC that something [previous] was non-aligned

2)      Invoke "GCC" with the "--v" (or "-v", or "-verbose") 
        I forget the exact flag - and look at what options are
        being passed to CC1 - and look those up in gcc info pages.

        Remember "gcc" is not the compiler, it is the driver.
        "gcc" reads the specs file then
        "gcc" executes the pre-processor then
        "gcc" executes the cc1 stage (the real compiler) then
        "gcc" executes the assembler then [optionaly]
        "gcc" executes the linker to make your app.

        The "-v" option - tells the driver to spew forth all of
        the options *as* passed to the sub-processes.

        I find it easier then understanding the "specs file"
 
Perhaps - OLD - did not turn on the "unaligned access"
and new one does


------
Want more information?  See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/
Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com