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On Mon, Aug 15, 2005 at 05:44:35PM +0200, Mikael Pettersson wrote:
> >The patch referenced in PR22528 does appear to fix PR23256. Thanks
> >much.
> >
> >Mikael, could you try the attached patch instead of the previous one?
>
> Using this PR22528 patch instead also results in a successful
> bootstrap of gcc-3.3.6 on XScale, so I guess this is the one to use.
>
> (To also answer Dan's question: the patch applies cleanly to 3.3.6.)
OK, so how about this patch? It makes my crosstool 0.38 successfully
build a gcc 3.3.5-based and gcc 3.3.6-based toolchain for armeb.
cheers,
Lennert
diff -urN crosstool-0.38.orig/demo-armeb.sh crosstool-0.38/demo-armeb.sh
--- crosstool-0.38.orig/demo-armeb.sh 2005-03-08 01:34:34.000000000 +0100
+++ crosstool-0.38/demo-armeb.sh 2005-08-15 20:36:36.000000000 +0200
@@ -15,6 +16,8 @@
#eval `cat armeb.dat gcc-3.3.2-glibc-2.3.2.dat` sh all.sh --notest
#eval `cat armeb.dat gcc-3.3.3-glibc-2.3.2.dat` sh all.sh --notest
#eval `cat armeb.dat gcc-3.3.4-glibc-2.3.2.dat` sh all.sh --notest
+#eval `cat armeb.dat gcc-3.3.5-glibc-2.3.2.dat` sh all.sh --notest
+#eval `cat armeb.dat gcc-3.3.6-glibc-2.3.2.dat` sh all.sh --notest
#eval `cat armeb.dat gcc-3.4.0-glibc-2.3.2.dat` sh all.sh --notest
#eval `cat armeb.dat gcc-3.4.1-glibc-2.3.2.dat` sh all.sh --notest
eval `cat armeb.dat gcc-3.4.1-glibc-2.3.3.dat` sh all.sh --notest
diff -urN crosstool-0.38.orig/patches/gcc-3.3.4/gcc-3.3.4-arm-pr22528.patch crosstool-0.38/patches/gcc-3.3.4/gcc-3.3.4-arm-pr22528.patch
--- crosstool-0.38.orig/patches/gcc-3.3.4/gcc-3.3.4-arm-pr22528.patch 1970-01-01 01:00:00.000000000 +0100
+++ crosstool-0.38/patches/gcc-3.3.4/gcc-3.3.4-arm-pr22528.patch 2005-08-15 20:16:41.000000000 +0200
@@ -0,0 +1,71 @@
+From http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html, by
+Richard Earnshaw. Fixes PR22528.
+
+--- gcc-3.3.4/gcc/config/arm/arm.md.orig 2004-03-30 22:43:44.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/arm.md 2005-08-15 12:21:55.000000000 +0200
+@@ -4275,7 +4275,7 @@
+ (set (match_dup 2)
+ (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+ ;; store the high byte
+- (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe
++ (set (match_dup 4) (match_dup 5))]
+ "TARGET_ARM"
+ "
+ {
+@@ -4291,7 +4291,8 @@
+ operands[1] = adjust_address (operands[1], QImode, 0);
+ operands[3] = gen_lowpart (QImode, operands[0]);
+ operands[0] = gen_lowpart (SImode, operands[0]);
+- operands[2] = gen_reg_rtx (SImode);
++ operands[2] = gen_reg_rtx (SImode);
++ operands[5] = gen_lowpart (QImode, operands[2]);
+ }"
+ )
+
+@@ -4299,7 +4300,7 @@
+ [(set (match_dup 4) (match_dup 3))
+ (set (match_dup 2)
+ (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+- (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))]
++ (set (match_operand 1 "" "") (match_dup 5))]
+ "TARGET_ARM"
+ "
+ {
+@@ -4316,13 +4317,14 @@
+ operands[3] = gen_lowpart (QImode, operands[0]);
+ operands[0] = gen_lowpart (SImode, operands[0]);
+ operands[2] = gen_reg_rtx (SImode);
++ operands[5] = gen_lowpart (QImode, operands[2]);
+ }"
+ )
+
+ ;; Subroutine to store a half word integer constant into memory.
+ (define_expand "storeinthi"
+ [(set (match_operand 0 "" "")
+- (subreg:QI (match_operand 1 "" "") 0))
++ (match_operand 1 "" ""))
+ (set (match_dup 3) (match_dup 2))]
+ "TARGET_ARM"
+ "
+@@ -4363,6 +4365,7 @@
+ operands[3] = adjust_address (op0, QImode, 1);
+ operands[0] = adjust_address (operands[0], QImode, 0);
+ operands[2] = gen_lowpart (QImode, operands[2]);
++ operands[1] = gen_lowpart (QImode, operands[1]);
+ }"
+ )
+
+@@ -4682,11 +4685,12 @@
+ (set (match_dup 3)
+ (ashiftrt:SI (match_dup 2) (const_int 16)))
+ (set (match_operand:HI 0 "s_register_operand" "")
+- (subreg:HI (match_dup 3) 0))]
++ (match_dup 4))]
+ "TARGET_ARM"
+ "
+ operands[2] = gen_reg_rtx (SImode);
+ operands[3] = gen_reg_rtx (SImode);
++ operands[4] = gen_lowpart (HImode, operands[3]);
+ "
+ )
+
diff -urN crosstool-0.38.orig/patches/gcc-3.3.5/gcc-3.3.4-arm-bigendian.patch crosstool-0.38/patches/gcc-3.3.5/gcc-3.3.4-arm-bigendian.patch
--- crosstool-0.38.orig/patches/gcc-3.3.5/gcc-3.3.4-arm-bigendian.patch 1970-01-01 01:00:00.000000000 +0100
+++ crosstool-0.38/patches/gcc-3.3.5/gcc-3.3.4-arm-bigendian.patch 2005-08-15 20:16:06.000000000 +0200
@@ -0,0 +1,62 @@
+diff -urN gcc-3.3.4.orig/gcc/config/arm/linux-elf.h gcc-3.3.4/gcc/config/arm/linux-elf.h
+--- gcc-3.3.4.orig/gcc/config/arm/linux-elf.h 2004-03-30 22:43:45.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/linux-elf.h 2004-08-20 02:13:02.969084177 +0200
+@@ -30,17 +30,31 @@
+ /* Do not assume anything about header files. */
+ #define NO_IMPLICIT_EXTERN_C
+
++/*
++ * 'config.gcc' defines TARGET_BIG_ENDIAN_DEFAULT as 1 for arm*b-*
++ * (big endian) configurations.
++ */
++#if TARGET_BIG_ENDIAN_DEFAULT
++#define TARGET_ENDIAN_DEFAULT ARM_FLAG_BIG_END
++#define TARGET_ENDIAN_OPTION "mbig-endian"
++#define TARGET_LINKER_EMULATION "armelfb_linux"
++#else
++#define TARGET_ENDIAN_DEFAULT 0
++#define TARGET_ENDIAN_OPTION "mlittle-endian"
++#define TARGET_LINKER_EMULATION "armelf_linux"
++#endif
++
+ /* Default is to use APCS-32 mode. */
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS | TARGET_ENDIAN_DEFAULT)
+
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
+-#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux -p"
++#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+
+ #undef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mapcs-32", "mno-thumb-interwork" }
+
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+
+@@ -88,7 +102,7 @@
+ %{rdynamic:-export-dynamic} \
+ %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2} \
+ -X \
+- %{mbig-endian:-EB}" \
++ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+ SUBTARGET_EXTRA_LINK_SPEC
+
+ #define TARGET_OS_CPP_BUILTINS() \
+diff -urN gcc-3.3.4.orig/gcc/config.gcc gcc-3.3.4/gcc/config.gcc
+--- gcc-3.3.4.orig/gcc/config.gcc 2004-04-29 06:42:47.000000000 +0200
++++ gcc-3.3.4/gcc/config.gcc 2004-08-20 02:11:04.326143343 +0200
+@@ -699,6 +699,11 @@
+ ;;
+ arm*-*-linux*) # ARM GNU/Linux with ELF
+ tm_file="dbxelf.h elfos.h arm/elf.h arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
++ case $machine in
++ arm*b-*)
++ tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
++ ;;
++ esac
+ tmake_file="t-slibgcc-elf-ver t-linux arm/t-linux"
+ extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
+ gnu_ld=yes
diff -urN crosstool-0.38.orig/patches/gcc-3.3.5/gcc-3.3.4-arm-pr22528.patch crosstool-0.38/patches/gcc-3.3.5/gcc-3.3.4-arm-pr22528.patch
--- crosstool-0.38.orig/patches/gcc-3.3.5/gcc-3.3.4-arm-pr22528.patch 1970-01-01 01:00:00.000000000 +0100
+++ crosstool-0.38/patches/gcc-3.3.5/gcc-3.3.4-arm-pr22528.patch 2005-08-15 20:16:42.000000000 +0200
@@ -0,0 +1,71 @@
+From http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html, by
+Richard Earnshaw. Fixes PR22528.
+
+--- gcc-3.3.4/gcc/config/arm/arm.md.orig 2004-03-30 22:43:44.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/arm.md 2005-08-15 12:21:55.000000000 +0200
+@@ -4275,7 +4275,7 @@
+ (set (match_dup 2)
+ (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+ ;; store the high byte
+- (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe
++ (set (match_dup 4) (match_dup 5))]
+ "TARGET_ARM"
+ "
+ {
+@@ -4291,7 +4291,8 @@
+ operands[1] = adjust_address (operands[1], QImode, 0);
+ operands[3] = gen_lowpart (QImode, operands[0]);
+ operands[0] = gen_lowpart (SImode, operands[0]);
+- operands[2] = gen_reg_rtx (SImode);
++ operands[2] = gen_reg_rtx (SImode);
++ operands[5] = gen_lowpart (QImode, operands[2]);
+ }"
+ )
+
+@@ -4299,7 +4300,7 @@
+ [(set (match_dup 4) (match_dup 3))
+ (set (match_dup 2)
+ (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+- (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))]
++ (set (match_operand 1 "" "") (match_dup 5))]
+ "TARGET_ARM"
+ "
+ {
+@@ -4316,13 +4317,14 @@
+ operands[3] = gen_lowpart (QImode, operands[0]);
+ operands[0] = gen_lowpart (SImode, operands[0]);
+ operands[2] = gen_reg_rtx (SImode);
++ operands[5] = gen_lowpart (QImode, operands[2]);
+ }"
+ )
+
+ ;; Subroutine to store a half word integer constant into memory.
+ (define_expand "storeinthi"
+ [(set (match_operand 0 "" "")
+- (subreg:QI (match_operand 1 "" "") 0))
++ (match_operand 1 "" ""))
+ (set (match_dup 3) (match_dup 2))]
+ "TARGET_ARM"
+ "
+@@ -4363,6 +4365,7 @@
+ operands[3] = adjust_address (op0, QImode, 1);
+ operands[0] = adjust_address (operands[0], QImode, 0);
+ operands[2] = gen_lowpart (QImode, operands[2]);
++ operands[1] = gen_lowpart (QImode, operands[1]);
+ }"
+ )
+
+@@ -4682,11 +4685,12 @@
+ (set (match_dup 3)
+ (ashiftrt:SI (match_dup 2) (const_int 16)))
+ (set (match_operand:HI 0 "s_register_operand" "")
+- (subreg:HI (match_dup 3) 0))]
++ (match_dup 4))]
+ "TARGET_ARM"
+ "
+ operands[2] = gen_reg_rtx (SImode);
+ operands[3] = gen_reg_rtx (SImode);
++ operands[4] = gen_lowpart (HImode, operands[3]);
+ "
+ )
+
diff -urN crosstool-0.38.orig/patches/gcc-3.3.6/gcc-3.3.4-arm-bigendian.patch crosstool-0.38/patches/gcc-3.3.6/gcc-3.3.4-arm-bigendian.patch
--- crosstool-0.38.orig/patches/gcc-3.3.6/gcc-3.3.4-arm-bigendian.patch 1970-01-01 01:00:00.000000000 +0100
+++ crosstool-0.38/patches/gcc-3.3.6/gcc-3.3.4-arm-bigendian.patch 2005-08-15 20:16:07.000000000 +0200
@@ -0,0 +1,62 @@
+diff -urN gcc-3.3.4.orig/gcc/config/arm/linux-elf.h gcc-3.3.4/gcc/config/arm/linux-elf.h
+--- gcc-3.3.4.orig/gcc/config/arm/linux-elf.h 2004-03-30 22:43:45.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/linux-elf.h 2004-08-20 02:13:02.969084177 +0200
+@@ -30,17 +30,31 @@
+ /* Do not assume anything about header files. */
+ #define NO_IMPLICIT_EXTERN_C
+
++/*
++ * 'config.gcc' defines TARGET_BIG_ENDIAN_DEFAULT as 1 for arm*b-*
++ * (big endian) configurations.
++ */
++#if TARGET_BIG_ENDIAN_DEFAULT
++#define TARGET_ENDIAN_DEFAULT ARM_FLAG_BIG_END
++#define TARGET_ENDIAN_OPTION "mbig-endian"
++#define TARGET_LINKER_EMULATION "armelfb_linux"
++#else
++#define TARGET_ENDIAN_DEFAULT 0
++#define TARGET_ENDIAN_OPTION "mlittle-endian"
++#define TARGET_LINKER_EMULATION "armelf_linux"
++#endif
++
+ /* Default is to use APCS-32 mode. */
+ #undef TARGET_DEFAULT
+-#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
++#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS | TARGET_ENDIAN_DEFAULT)
+
+ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
+
+-#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux -p"
++#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
+
+ #undef MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+- { "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
++ { "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mapcs-32", "mno-thumb-interwork" }
+
+ #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
+
+@@ -88,7 +102,7 @@
+ %{rdynamic:-export-dynamic} \
+ %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2} \
+ -X \
+- %{mbig-endian:-EB}" \
++ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+ SUBTARGET_EXTRA_LINK_SPEC
+
+ #define TARGET_OS_CPP_BUILTINS() \
+diff -urN gcc-3.3.4.orig/gcc/config.gcc gcc-3.3.4/gcc/config.gcc
+--- gcc-3.3.4.orig/gcc/config.gcc 2004-04-29 06:42:47.000000000 +0200
++++ gcc-3.3.4/gcc/config.gcc 2004-08-20 02:11:04.326143343 +0200
+@@ -699,6 +699,11 @@
+ ;;
+ arm*-*-linux*) # ARM GNU/Linux with ELF
+ tm_file="dbxelf.h elfos.h arm/elf.h arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
++ case $machine in
++ arm*b-*)
++ tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
++ ;;
++ esac
+ tmake_file="t-slibgcc-elf-ver t-linux arm/t-linux"
+ extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
+ gnu_ld=yes
diff -urN crosstool-0.38.orig/patches/gcc-3.3.6/gcc-3.3.4-arm-pr22528.patch crosstool-0.38/patches/gcc-3.3.6/gcc-3.3.4-arm-pr22528.patch
--- crosstool-0.38.orig/patches/gcc-3.3.6/gcc-3.3.4-arm-pr22528.patch 1970-01-01 01:00:00.000000000 +0100
+++ crosstool-0.38/patches/gcc-3.3.6/gcc-3.3.4-arm-pr22528.patch 2005-08-15 20:16:44.000000000 +0200
@@ -0,0 +1,71 @@
+From http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html, by
+Richard Earnshaw. Fixes PR22528.
+
+--- gcc-3.3.4/gcc/config/arm/arm.md.orig 2004-03-30 22:43:44.000000000 +0200
++++ gcc-3.3.4/gcc/config/arm/arm.md 2005-08-15 12:21:55.000000000 +0200
+@@ -4275,7 +4275,7 @@
+ (set (match_dup 2)
+ (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+ ;; store the high byte
+- (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe
++ (set (match_dup 4) (match_dup 5))]
+ "TARGET_ARM"
+ "
+ {
+@@ -4291,7 +4291,8 @@
+ operands[1] = adjust_address (operands[1], QImode, 0);
+ operands[3] = gen_lowpart (QImode, operands[0]);
+ operands[0] = gen_lowpart (SImode, operands[0]);
+- operands[2] = gen_reg_rtx (SImode);
++ operands[2] = gen_reg_rtx (SImode);
++ operands[5] = gen_lowpart (QImode, operands[2]);
+ }"
+ )
+
+@@ -4299,7 +4300,7 @@
+ [(set (match_dup 4) (match_dup 3))
+ (set (match_dup 2)
+ (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
+- (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))]
++ (set (match_operand 1 "" "") (match_dup 5))]
+ "TARGET_ARM"
+ "
+ {
+@@ -4316,13 +4317,14 @@
+ operands[3] = gen_lowpart (QImode, operands[0]);
+ operands[0] = gen_lowpart (SImode, operands[0]);
+ operands[2] = gen_reg_rtx (SImode);
++ operands[5] = gen_lowpart (QImode, operands[2]);
+ }"
+ )
+
+ ;; Subroutine to store a half word integer constant into memory.
+ (define_expand "storeinthi"
+ [(set (match_operand 0 "" "")
+- (subreg:QI (match_operand 1 "" "") 0))
++ (match_operand 1 "" ""))
+ (set (match_dup 3) (match_dup 2))]
+ "TARGET_ARM"
+ "
+@@ -4363,6 +4365,7 @@
+ operands[3] = adjust_address (op0, QImode, 1);
+ operands[0] = adjust_address (operands[0], QImode, 0);
+ operands[2] = gen_lowpart (QImode, operands[2]);
++ operands[1] = gen_lowpart (QImode, operands[1]);
+ }"
+ )
+
+@@ -4682,11 +4685,12 @@
+ (set (match_dup 3)
+ (ashiftrt:SI (match_dup 2) (const_int 16)))
+ (set (match_operand:HI 0 "s_register_operand" "")
+- (subreg:HI (match_dup 3) 0))]
++ (match_dup 4))]
+ "TARGET_ARM"
+ "
+ operands[2] = gen_reg_rtx (SImode);
+ operands[3] = gen_reg_rtx (SImode);
++ operands[4] = gen_lowpart (HImode, operands[3]);
+ "
+ )
+
------
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