Reducing output verbosity

[Jay Cornwall <jlc01 at doc dot ic dot ac dot uk>]

Hi

Is there any way to reduce the verbosity of make when used with
Makefiles generated by Automake? The output just seems to get bigger and
bigger with every Automake version increase, and it's quite messy when
I'm not debugging.

For example:

if gcc -DPACKAGE_NAME=\"utopia\" -DPACKAGE_TARNAME=\"utopia\"
-DPACKAGE_VERSION=\"0.1\" -DPACKAGE_STRING=\"utopia\ 0.1\"
-DPACKAGE_BUGREPORT=\"\" -DPACKAGE=\"utopia\" -DVERSION=\"0.1\"  -I. -I.
-g -O2 -MT shell.o -MD -MP -MF ".deps/shell.Tpo" \
  -c -o shell.o `test -f 'shell.c' || echo './'`shell.c; \
then mv ".deps/shell.Tpo" ".deps/shell.Po"; \
else rm -f ".deps/shell.Tpo"; exit 1; \
fi

Do all those defines really need to be done on the command line? And is
it really necessary to print the if/else/fi blocks?

I'd much rather my project just displayed things like:
  gcc -g -O2 shell.o shell.c

So I can see at a glance what is actually being compiled, and
which errors/warnings are generated, rather than all the extra, well,
junk. :)

Cheers,
Jay

-- 
http://www.evilrealms.net/ - Systems Administrator & Developer
http://www.ic.ac.uk/ - Imperial College, 2nd year CS student