Automake's include "overrides" makes include?

[Daniel Shane <daniel dot shane at eicon dot com>]

Hi,

I am trying to write a rule that will rebuild a tar.gz of a number of
directories when some of the files change. Here is an example of Makefile
that works with make :

DIRS = project1 project2
RESULT = $(foreach dir,$(DIR),$(dir).tar.gz)

all: $(RESULT)

$(RESULT):
	tar xvf $@ ($subst .tar.gz,,$@)

include tar_deps.mk

tar_deps.mk: Makefile
	for dir in $(DIRS); do \
		echo -n "$$f.tar.gz: " >> $@; \
		find $$f -type f -printf "%p " >> $@; \
	done;

This uses a cleaver "include" make trick. When tar_deps gets overriten, make
will re-include it and re-scan the Makefile.

Now when I use this with automake, it doesnt work because I cant seem to be
able to pass the "include tar_deps.mk" statement intact to the Makefile
since it is also a keywork of automake. Does anyone have an idea on how I
could work around this? 

Of course, I would like a solution where I do not have to list all the files
in project1 "hard-coded" in the Makefile.am. Is this possible?

I'm out of ideas...

Daniel Shane