7. Simulation support

Simulator support comes in the form of machine generated the decoder/executer as well as the structure that records CPU state information (ie. registers).

There are 3 architecture-wide generated files:

`arch.h'

Definitions and declarations common to the entire architecture.

`arch.c'

Tables and code common to the entire architecture, but which can't be put in the common area.

`cpuall.h'

Pseudo base classes of various structures.

Each "CPU family" has its own set of the following files:

`cpu.h'

Definitions and declarations specific to a particular CPU family.

`cpu.c'

Tables and code specific to a particular CPU family.

`decode.h'

Decoder definitions and declarations.

`decode.c'

Decoder tables and code.

`model.c'

Tables and code for each model in the CPU family.

`semantics.c'

Code to perform each instruction.

`sem-switch.c'

Same as `semantics.c' but as one giant switch statement.

A "CPU family" is an artificial creation to sort architecture variants along whatever lines seem useful. Additional hand-written files must be provided. See section 5. Porting, for details.